KodiakTM PCIe® 7.0 / CXL® 4.0 Protocol Test, Analysis, and Compliance System
Meet the new Kodiak
Introducing Kodiak PCIe 7.0
SerialTek’s Kodiak™ PCIe® 7.0 Protocol Test and Analysis platform captures, analyzes, and generates PCIe 7.0 traffic at 128 GT/s across all sixteen lanes — scheduled to ship in Q1 2027. This platform is the third generation built on Kodiak’s accelerated, clean-sheet architecture, introduced at PCIe 5.0, proven through PCIe 6.0, and engineered from inception for PCIe 7.0 vast data volumes.
Our unique architecture eliminates the pain points engineers have endured for years: slow trace processing, hours lost moving captures between machines, and probing methods that disturb the signals under test. With Kodiak, the data never leaves the system. Analysis starts within seconds of capture, whether the engineer is at the bench or working from across the world.
Collaborate From Any Browser, Automate with Agentic Workflow
Analysis runs on Kodiak’s embedded server, so distributed engineers open the same trace at the same time from any browser, with no local processing and no files to move.†
†PCIe 6.0 model shown. The PCIe 7.0 platform retains BusXpert™ browser-based access and multi-user networking.
Kodiak’s BusXpert™ application runs natively in the browser, accessible through a standard web interface or an identical standalone application, giving engineers a lean, modern interface with no software to install and no IT provisioning required to get started. Analysis runs directly from the equipment. Processing and storage happen entirely on Kodiak’s embedded server, so none of it touches the engineer’s machine, and memory, disk, and responsiveness stay untouched even with the largest traces open. Distributed teams can open the same trace concurrently over secure remote connections, working from a single source of truth.
Kodiak is fully programmable. A REST API drives every function of the system, integrating capture, analysis, and traffic generation into CI/CD pipelines for unattended regression. SerialTek’s own validation engineers use this interface to apply AI to link statistics across multi-day windows, catching drift and anomalies that no one is watching for in real time. As teams build agentic workflows around their test equipment, Kodiak’s programmable architecture already supports them.
Flexible. Web-Based. Built for Engineers.
Web-based, highly user-friendly interface allows engineers to quickly configure system, monitor device statuses, and perform detailed test and analysis from any OS, anywhere.†
†Interface screens shown reflect the current Kodiak PCIe 6.x platform and are representative of the functionality planned for the PCIe 7.0 release.
Detailed compliance report — Compile a full PCIe 6.0 compliance report across every trained speed and mode, from 2.5 GT/s up through 64.0 GT/s Flit Mode, in one color-coded view. Pass, fail, and skipped results are grouped by test ID so engineers can pinpoint exactly where a device falls out of spec, without digging through raw logs.
Kodiak PCIe 7.0 / CXL 4.0 Protocol Analyzer
The Kodiak PCIe 7.0 / CXL 4.0 Protocol Analyzer captures and decodes live traffic in real time, giving engineers direct visibility into protocol behavior, link training, and system-level interactions as they happen.
Multi-User Access and Trace Buffering
Multiple engineers can access and work on the same trace concurrently. Extensive trace buffering retains data even during high-speed capture, so developers can review capture history without gaps during troubleshooting.
Flexible Trace Storage
Traces save directly to Kodiak’s internal SSD storage, up to 8TB, so large files never need to move to a local PC first. Traces can be opened directly on Kodiak, zipped for efficient transfer, or downloaded to a client for further analysis.
Triggers, Filters, and Trace Processing
A full suite of PCIe, CXL, and NVMe triggers, filters, and trace processing tools gives users precise control over data acquisition, capturing and analyzing specific events of interest.
Root Cause Tracing
Every event in a trace, down to the exact link speed, width, and channel, is timestamped, so engineers can trace a protocol violation straight through the sequence of events that caused it.
Synchronized Trace Analysis
Synchronized Events, Transactions, and Timeline views let engineers move fluidly between individual packets and the higher-level transactions they form, with protocol activity correlated to integrated Quarch power monitoring data on the same timeline.
Detailed Compliance Reporting
Compile results from every trained speed and mode into one color-coded view. Pass, fail, and skipped results are grouped by test ID so engineers can pinpoint exactly where a device falls out of spec, without digging through raw logs.
Kodiak PCIe 7.0 / CXL 4.0 Protocol Tester
The Kodiak PCIe 7.0 / CXL 4.0 Protocol Tester (exerciser) is designed for testing and validating PCI Express and CXL implementations, ensuring compliance, validating spec-conformant behavior, and optimizing device and system performance.
Ensure Compliance and Validate Quality
- ● Verify conformance to the PCIe Certification Test Suite (CTS) and SerialTek-specific quality test suites
- ● Validate implementations against industry standards for robustness and quality
Test Without Host or Device Silicon
Overcome limited access to hosts and devices by using the tester for early testing and troubleshooting, before a full system is available.
Troubleshoot and Reproduce Issues
Convert captured traces with known issues into reproducible tests, turning a one-off failure into a repeatable troubleshooting scenario.
Verify Specific Protocol Features
Test and validate features including Data Object Exchange (DOE), Integrity and Data Encryption (IDE), and Link Training and Status State Machine (LTSSM) state transitions.
Manual Testing and Customization
Modify capabilities and perform manual testing, including sending specific TLPs or testing responses to malformed TLPs.
Early and Ongoing Performance Testing
Run performance testing at multiple stages of development to identify bottlenecks and optimize device and system performance.
Compliance Coverage
For CXL compliance, the tester follows the CXL specification across CXL.io and CXL.cache Application Layer and Transaction Layer testing, Link Layer testing, ARB/MUX, Switch Tests, and Configuration Register Tests. For PCIe, it offers a compliance suite covering Link Layer, Transaction Layer, and Protocol functionality.
Manual Mode
Manual Mode lets engineers emulate a host or device environment, modify configuration space, change LTSSM states, and force sideband signals, enabling targeted validation of specific protocol behaviors.
Automation & Performance
A web-based interface with script-building capabilities lets engineers create customized test scenarios, while a REST API supports performance testing and automation. The tester provides real-world simulation, detailed performance metrics, and test result analysis to support data-driven decisions at every stage of development.
Technical specifications are preliminary and subject to change without notice.
Kodiak Enclosure
Displays and Indicators
Front-Panel Connectors
Rear-Panel Connectors
Warranty
Maintenance and Licensing
- ● Free lifetime software updates, no maintenance fees
- ● Free full-featured viewer software to share annotated traces and replay captured traffic
- ● Use SerialTek hardware on any computer, no additional licenses required
What Customers are Saying
Comments from real hardware design and validation engineers at leading global technology companies about Kodiak:
“That’s so quick! We already have good traces!”
“Hey, we don’t have to install software anymore!”
“The GUI is really great!”
— Prospective Customer
“With other analyzers, I have had to abandon my testing many times, because I could not find a good quality signal lock. SerialTek’s Kodiak analyzer and SI-Fi interposers have changed all that. I have 100% confidence in Kodiak’s ability to achieve lock and give me the trace I need to do my job. Kudos to SerialTek for creating not only an electrically reliable platform, but the actual mechanical hardware itself is beautiful.”
— SerialTek Customer
Kodiak PCIe 7.0 / CXL 4.0 x16 Protocol Test and Analysis System
Technical Capabilities
What PCIe 7.0 Protocol Analysis Requires
- ●Capturing 128 GT/s PAM4 traffic without disrupting the system
- ●Decoding Flit Mode protocol transactions in real time
- ●Identifying Forward Error Correction (FEC) events and link training issues
- ●Using inline interposers built for tighter channel loss budgets at 128 GT/s
- ●Validating CXL 4.0 protocol and memory-coherency behavior as bandwidth scales